Software Engineer · Researcher

Alwalid Salama

Staff Software Engineer at Qualcomm working on virtual platforms, QEMU, and hardware-software co-design. Focused on embedded systems simulation and tooling.

Currently Staff SWE @ Qualcomm
Education M.Sc. & B.Sc. @ RWTH Aachen
Based in Aachen, Germany
Languages English · German · Arabic

I'm a computer engineer specializing in embedded systems, virtual platforms, and simulation tooling. At Qualcomm, I'm part of the QQVP (Qualcomm QuIC Virtual Platform) team, contributing to Qbox and advancing hardware-software co-design infrastructure.

My research focuses on code coverage for embedded systems, simulation time federation, and virtual platform tooling. My NQC² paper was a cooperation between RWTH Aachen's ICE institute and Qualcomm. Both of my published papers received Best Paper Awards at their respective conferences.

Before joining Qualcomm, I worked at GreenSocs in France and spent several years as a research assistant at RWTH Aachen, where I also taught Foundations of Computer Science.

2× Best Paper Award RAPIDO @ HiPEAC 2024 · DVCon Europe 2025
Q
Staff Software Engineer Qualcomm, QQVP Team
M.Sc. Computer Engineering RWTH Aachen University

Career

Aug 2024 · Present
Staff Software Engineer
@ Qualcomm, QQVP Team
Virtual platform development, Qbox, QEMU-based simulation infrastructure
Jul 2022 · Aug 2024
Consultant Engineer
@ Qualcomm, QQVP Team
QuIC Virtual Platform development, contributing to the open-source Qbox project
Apr 2021 · Jul 2022
Engineer Intern
@ GreenSocs (France)
Virtual platform tooling and simulation
Feb 2019 · Apr 2021
Student Research Assistant
@ ICE, RWTH Aachen
Institute for Communication Technologies and Embedded Systems
Apr 2018 · Jul 2019
Student Research Assistant
@ TI, RWTH Aachen
Institute for Theoretical Information Technology
2018 · 2020
Tutorial Instructor
Foundations of Computer Science 1, two semesters

Education

M.Sc. Computer Engineering
Electrical Engineering, IT & Computer Engineering @ RWTH Aachen
Period Oct 2019 · Nov 2023
Grade 2.3 overall · Thesis: 1.3
Thesis: Evaluation of Code Coverage Metrics on Virtual Platforms, at ICE Institute
Supervisor: Lukas Jünger
B.Sc. Computer Engineering
Electrical Engineering, IT & Computer Engineering @ RWTH Aachen
Period 2016 · 2019
Grade 2.3 overall · Thesis: 1.0
Thesis: Design and Implementation of a Hardware/Software Test Environment for Infotainment Systems, at ICE Institute
Supervisor: Lukas Jünger
Languages
English C1
German C1
Arabic Native

Publications

Best Engineering Paper Award, DVCon Europe 2025
DVCon October 2025

Simulation Time Federation

Mark Burton, Alwalid Salama, Mahmoud Kamel

Qualcomm

Proposes a unified API for synchronising time across heterogeneous simulators. The paper addresses how QEMU's evolving icount mode, new structures proposed for SystemC 4.0, and the Zenoh communication framework can be combined into a single time-synchronisation interface, tested across SystemC parallel threads, SystemC-QEMU bridges, and distributed SystemC processes.

Best Paper Award, RAPIDO @ HiPEAC 2024
ACM January 2024

NQC²: A Non-Intrusive QEMU Code Coverage Plugin

Nils Bosbach, Alwalid Salama, Lukas Jünger, Mark Burton, Niko Zurstraßen, Rebecca Pelke, Rainer Leupers

Cooperation between RWTH Aachen ICE and Qualcomm

Introduces NQC², a QEMU plugin that captures code coverage at runtime without instrumenting the target software. Unlike conventional approaches that require an OS and filesystem on the target, NQC² works directly with bare-metal programs on embedded systems and is compatible with modified QEMU versions, outperforming comparable approaches by up to 8.5×.

Talks

KVM Forum 2025 September 2025

From Time to Time: QEMU Time Control Redefined

Mark Burton, Alwalid Salama, Mahmoud Kamel

Qualcomm

Presents a new approach to QEMU timekeeping using the TCG plugin API. Instead of relying on the traditional icount mode, which forces single-threaded execution, this talk introduces per-vCPU local clocks with independent instruction-based timing and a global time coordination mechanism via an active token. The result is realistic instruction-based timing with full MTTCG compatibility, idle-aware timekeeping, and a clean plugin-based architecture.

Let's talk.

Find me across the internet or reach out to collaborate.